Computing devices typically include memory controllers to control access to memory, e.g., by a processor, to read and write data. For instance, memory may be configured as Dynamic Random Access Memory (DRAM), which provides the “main memory” of the computing device that is used to store data for use by the processor, such as computer-executable instructions, data for further processing according to the computer-executable instructions, and so on.
One technique that has been utilized to improve the efficiency of access to the DRAM is to close a “page” to main memory when traffic to the memory has been idle for a predetermined amount of time, which may be referred to as an “idle time”. Thus, future requests to the memory will be performed with “page empty” timing and therefore do not encounter additional overhead to close the page before another page is opened. A performance gain, for example, may be encountered when future requests result in more “page misses” (e.g., a different page than the one that is open is subject to a next memory transaction) than “page hits”. Therefore, if the “missed” page is already closed, the overhead in requesting another page is minimized.
In order to determine when to close a page, a memory scoreboard may be utilized which indicates whether there are pending requests to the memory, and thus, whether the memory is idle. Traditional techniques which were utilized to provide the scoreboard, however, were inefficient and as such may have a significant gate count that consumes valuable semiconductor resources.
The same reference numbers are utilized in instances in the discussion to reference like structures and components.